A) AND gate
B) NAND gate
C) NOR gate
D) OR gate
Correct Answer: C
Solution :
The gate circuit can be shown by giving two inputs A and B.NOR | NAND | NOT | ||||
A | B | \[{{Y}_{1}}\] | \[{{Y}_{1}}\] | \[{{Y}_{1}}\] | \[{{Y}_{2}}\] | Y |
0 | 0 | 1 | 1 | 1 | 0 | 1 |
0 | 1 | 0 | 0 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 0 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 1 | 0 |
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