question_answer

The output Y of the logic circuit shown in figure is best represented as ;

A) \[\overline{\operatorname{A}}+\overline{B-C}\]              

B) \[\operatorname{A}+\overline{B}.C\]

C) \[\overline{\operatorname{A}+B.C}\]                  

D) \[\overline{\operatorname{A}+\overline{B}.C}\]

Correct Answer: D

Solution :

\[\operatorname{Y}=\overline{A+\overline{B}.C}\]