Answer:
(a) The gate combination of Fig. (a) represents a NAND gate.
(a) Logic symbol of NAND gate.
Truth table of NAND Gate
(b) The gate combination of Fig. (b) represents a NOR gate.
(b) Logic symbol of NOR gate.
Truth table of NOR gate
Input
A
Input
B
Output
\[\Upsilon \]
0
0
1
0
1
1
1
0
1
1
1
0
Input
A
Input
B
Output
\[\Upsilon \]
0
0
1
0
1
0
1
0
0
1
1
0
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