question_answer

Inputs A and B are applied to the logic gate set up as shown below. Complete the truth table given below, and name the equivalent gate formed by this 'set-up'.  

A	B	A’	B’	\[\Upsilon \]
0	0
0	1
1	0
1	1

 

Answer:

 

A	B	A’	B’	\[A'+B'\]	\[\Upsilon =\overline{A'+B'}\].
0	0	1	1	1	0
0	1	1	0	1	0
1	0	0	1	1	0
1	1	0	0	0	1

  The given set-up is equivalent to an AND gate.